Documentation

This section provides user and developer documentation for OpenTRNG the open-source TRNG.

Repository organization

Take a look at repository organization below and, based on your requirements, navigate to the relevant directory to begin using OpenTRNG. The repository structure contains these main folders:

Prerequisites

In order to fully take benefit of OpenTRNG, you will need: python 3, an HDL simulator and an hardware (FPGA) tool-suite.

Python

To get the required installation of Python 3, please install the following packages:

$ sudo apt install python3 python3-venv python3-dev

Create a virtual environment $ python3 -m venv .venv activate the venv $ source .ven/bin/activate and install required packages with $ pip install -r requirements.txt. For other Python environment or package managers (like conda), all required modules are listed in requirements.txt.

HDL simulator

You can perform VHDL simulation for OpenTRNG blocks using GHDL or other various simulators such as QuestaSim. Ensure that the ghdl command (or other simulator command) is accessible in your path. Testbenches for simulation and verification are written in python with cocotb. The generated waves (vcd files) can be displayed with GTKWave.

If you are not using ghdl, please refer to the file hardware/sim/config.mk to configure your own simulator for all the testbenches.

Hardware

If you want to use more than just the OpenTRNG emulators, you will need a hardware target.

Hardware target

OpenTRNG comes with direct compatibility to Digilent Arty7 FPGA 35T board. It can be ordered from Farnell, Digikey, Mouser, etc. Other FPGA targets and boards can be easily supported, please find more information on the hardware documentation page.

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Hardware tool-suite

As of now the OpenTRNG project only supports Vivado for Xilinx FPGAs. The project is tested on Vivado versions 2018.3, 2020.2 and 2021.1.